1. Technical Field
This disclosure relates to processors, and more particularly to vector instruction execution during a branch misprediction of predicated branch instructions.
2. Description of the Related Art
Branch prediction has become commonplace in most modern processors. While backward branches may be highly predictable, forward branches may or may not be predicted well, depending on the nature of the data being processed.
Some processors that process vector instructions use masking predication when performing calculations to control whether elements in a vector are modified, or retain their unmodified value. More particularly, predicate vectors may control whether individual elements of a vector are modified. In some cases, a branch instruction may be used to branch around the predicated instructions when the predicate vector contains all zeroes. This may generally be an improvement to power and performance in situations when the branches are accurately predicted.
In a conventional vector processor when a branch is mispredicted, the processor pipeline may typically be flushed and new instructions fetched from a different address such as the branch target address. However, this type of conventional branch misprediction behavior may be unnecessary and wasteful.